InPA Systems and the Dini Group, announced that they have partnered for the development and testing of an integrated solution for high-speed, multi-FPGA debug. This technology is still in beta, but it is expected to be released in Q3 2011. InPA will demonstrate their integrated technology at the InPA Systems booth at DAC 2011 in June (Booth #3216).

How do the two technologies work together? The Dini Group has provided a special connector on certain V6 based boards for debug access to the programmable logic, specifically for use with the InPA technology. InPA utilizes the Dini debug connector to access all user FPGAs and the configuration FPGA that is on the V6 based boards. The unique benefit of this partnership is that, because the InPA technology shares the same configuration FPGA on the Dini board, the user does not need a separate board to control the high-speed multi-FPGA trigger and capture debug activity. The InPA Systems Active DebugTM technology is the first comprehensive solution that streamlines the SoC bring-up and debug process when using multiple FPGA prototype systems, like the Dini DN2076k10 6-FPGA system.

“We are very pleased that InPA selected our Xilinx FPGA based ASIC Prototyping platform for their new technology,” said Mike Dini, President of the Dini Group. “High speed, multichip FPGA debug will provide great value to our market, and InPA is a true pioneer in this effort.”

“The Dini Group has been instrumental in testing and helping integrate our technologies,” said Joe Gianelli, Vice President of Marketing at InPA Systems, “The debug of today’s SoCs on multi-FPGA prototype systems is daunting to say the least. Our aim is to make this process much more efficient with a combination of methodology and advanced technology.”

InPA Systems came on the scene last August when it announced the formation of its company. InPA’s Active Debug  technology allows users unprecedented visibility and control of the verification and validation process when integrating SoC software and hardware onto multi-FPGA prototype systems. The primary benefit to users? A drastic reduction in the current prototyping debug methodology’s highly iterative process of “blind” or passive probing and multiple FPGA implementation iterations, thus getting the user to SoC pre-silicon prototype faster.