It seems that these days everyone wants a "supercomputer" in their pocket. Consumers are demanding more performance and power from smaller and sleeker devices. However, even the latest gadgets have physical size limitations that will soon impede their ability to support consumer requirements, which could translate into a future rife with slower and clunkier devices. The performance wall represents a serious issue that vendors are addressing via the multicore processors that are now showing up in everyday devices from game consoles to cell phones. But, they haven't addressed the problem entirely. Writing software for these multicore processors, also known as parallel programming is difficult and requires specialized training and experience. Transactional Memory is a new technology that greatly simplifies parallel programming.

Since its launch in January 2008, the VELOX Project has focused on delivering the first integrated Transactional Memory Stack to serve as both proof-of-concept and a test-bed for this new technology.

Coordinated by the Barcelona Supercomputing Center, the VELOX Consortium gathers eight different partners that include top research organizations, University of Neuchâtel, the Technische Universität Dresden, Ecole Politechnique Fédérale de Lausanne, Tel Aviv University, and Chalmers University of Technology as well as leading system integrators from the IT industry, AMD and RedHat. The VELOX Project Team consists of internationally recognized TM experts that have been working to solve the well-known TM research problems and to implement their solutions into a fully integrated VELOX Stack. The first release of this stack is now available for download at www.velox-project.eu/releases. The release offers the first complete Transactional Memory Stack complete with hardware simulators, OS, runtime, compilers (including the production gcc-tm), libraries and applications. While the current release focuses on C and Java compatibility, future releases will add C++ compatibility.