APPLICATIONS
Xilinx Demos Highest Performance FPGA-Based Acceleration Module at IDF Beijing
At 6.4 Gbyte/s data transfer speeds, Xilinx achieves fastest processor system interface of any FPGA to date with a new accelerated computing platform: Xilinx today announced it will demonstrate the world’s highest performance FPGA-based acceleration module at the Intel Developer Forum China this week. The Xilinx Accelerated Computing Platform (ACP) targets Intel Front Side Bus (FSB)-FPGA accelerator modules and features an FSB-capable VirtexTM-5 FPGA module as a plug-in to an Intel Xeon CPU socket.
Xilinx will demonstrate data transfers over the Intel FSB between system memory and the latest 65nm Virtex FPGA (field programmable gate array), achieving bus speeds of 800 MHz capable of supporting 6.4 Gbytes/s data transfers.
Xilinx FPGA products and solutions enabled by SelectIO and RocketIO technologies to support a multitude of high speed parallel and serial connectivity standards, can significantly accelerate high performance computing applications in scientific, oil and gas, financial, and life sciences, while considerably reducing power, space and cooling requirements. The Xilinx ACP module is intended to complement and accelerate Xeon-based dual- and multi-processor high performance workstation and server systems.
“Xilinx has demonstrated excellent results with its new accelerated computing platform,” said Dr. Dileep Bhandarkar, Director of Advanced Architectures for Intel Corporation. “Their continued development for the latest generation of interfaces, such as the Front-Side Bus, will lead to new solutions and even greater levels of performance for today’s most demanding, compute-intensive applications.”
“Xilinx is proud to showcase the advanced capabilities of our award winning Virtex-5 FPGA family on the Intel platform,” added Xilinx Chief Technology Officer Ivo Bolsens. “This front-side bus technology demonstration represents another exciting breakthrough for the industry in high performance computing, thereby driving adoption of these key new technological advances in the mainstream markets”
Accelerated Computing Platform Solutions – Intel IDF China Highlights
Keynote
* “Instilling Energy into the Enterprise,” Patrick Gelsinger, senior vice president and general manager, Digital Enterprise Group – April 17, 10:10-11:00
At this session, attendees will hear Gelsinger’s vision for technical innovation acceleration in the compute industry. From small offices to the most powerful High Performance Computing, the Digital Enterprise is moving forward at extreme speed. Intel's microprocessors, components and computers are leading the way into this future.
Demonstrations
* “Wall of Accelerators” – Booth 164
A wide range of accelerator boards with GPUs, CPUs and FPGAs will be showcased, including FPGA-based solutions from Xilinx: ACP M1 (FSB), ML505 (PCIe-x1) and Xilinx ML555 (PCIe-x8).
Sessions
* “Front Side Bus (FSB) FPGA Application Accelerators – Roadmap, Capabilities, Pros and Cons, and Usage Models,” Dr. Avinash Palaniswamy, product marketing engineer
Learn more about availability of FSB FPGA accelerators in 2007, capabilities of FSB FPGA modules for acceleration, pros and cons of acceleration and application acceleration usage models
* “Defining the Next Generation of PCI Express Architectural Extensions,” Ajay Bhatt, Intel Fellow, Digital Enterprise Group, Director, Platform Components and Interconnects Architecture, Intel Corporation
Technical overview of the protocol and software extensions that comprise the next generation of the PCI Express architecture. Comprehensive look at the Geneseo protocol and required electrical parameters to achieve the next generation of PCIe signaling bit rate.
Chalk Talk
* “Geneseo Extensions,” Ajay Bhatt, Intel Fellow, Digital Enterprise Group, Director, Platform Components and Interconnects Architecture, Intel Corporation
In-depth and interactive opportunity to discuss the important features of the Geneseo protocol extensions and the electrical parameters to achieve the next PCI Express signaling bit rate.