SCIENCE

NetLogic Microsystems has announced that real-world performance benchmarks conducted by several Tier One customers have validated that NetLogic Microsystems’ industry-leading XLP multi-core processor delivers 300-400 percent performance improvement over competing multi-core communications processors. This dramatic performance increase has been consistently validated in multiple actual original equipment manufacturers’ (OEMs’) system designs which are running real-world, field-proven software applications across numerous systems addressing wireless infrastructure, deep-packet content processing, enterprise networking, control plane processing, and security and storage markets.

“Having customer validations showing 3-4x performance improvement by multiple Tier One OEMs running their real-world applications only four months after we started sampling our revolutionary XLP multi-core processors, gives us a clear, unmatched leadership position in multi-core communications processors,” said Behrooz Abdi, executive vice president and general manager at NetLogic Microsystems. “This comes at an ideal time as the communications industry desperately needs significant breakthroughs in performance and power profiles to keep pace with the dramatic increase in bandwidth and traffic complexity.”

These performance benchmarks span a wide variety of OEM systems, including LTE base stations, LTE gateways, 3G base stations, network security appliances, service gateways, deep-packet inspection (DPI) ATCA sub-systems, and network storage appliances.

"These benchmarks validate our initial estimates that the XLP processor's powerful quad-issue, quad-threaded CPU, running at 2.0GHz, generates 3x to 4x the performance of competing processors on a core-to-core basis," said Linley Gwennap, principal analyst of The Linley Group. "This performance advantage will help NetLogic Microsystems overcome bottlenecks in network infrastructure and address next-generation LTE, data center and enterprise networking opportunities.”

NetLogic Microsystems’ breakthrough XLP multi-core processor architecture offers unparalleled processing performance with scalability up to 128 NXCPUs, each operating at up to 2.0 GHz and based on a best-in-class superscalar engine and out-of-order execution capabilities for converged data plane and control plane processing. The 128 NXCPUs of the XLP multi-core processor offers full cache and memory coherency over the high-speed Inter-chip Coherency Interface (ICI), enabling software applications to seamlessly run in Symmetric Multi Processing (SMP) or Asymmetric Multi Processing (AMP) modes.

The best-in-class XLP multi-core processor solution is designed to deliver an unprecedented 160Gbps throughput and 240 million packets-per-second (Mpps) of intelligent application performance for next-generation 3G/4G mobile wireless infrastructure, enterprise, storage, security, metro Ethernet, edge and core infrastructure network applications.

The XLP multi-core, multi-threaded processor features NetLogic Microsystems' high-speed, low-latency Enhanced Fast Messaging Network to enable efficient, high-bandwidth communication among the 128 NXCPUs and to support billions of in-flight messages and packet descriptors between all on-chip elements. To complement the 128 NXCPUs, the XLP processor offers over 160 fully-autonomous processing engines that provide independent and complete offload of certain network functions from the NXCPUs, including:

• 160 Gbps fully-autonomous Security Acceleration Engines supporting networking, wireless and storage encryption/decryption/authentication protocols
• 160 Gbps Network Acceleration Engines for Ingress/Egress Packet Parsing and Management
• 512 Gbps RAID-5/RAID-6 Acceleration
• 40 Gbps Compression/Decompression
• Packet Ordering
• Storage De-Duplication Acceleration
• TCP Segmentation Offload
• IEEE 1588 Hardware Time Stamping

In addition, the XLP multi-core processor offers a tri-level cache architecture with over 50 Mbytes of fully coherent on-chip cache which delivers 40 Terabits/sec of extremely high-speed on-chip memory bandwidth. It also incorporates 16 channels of 72-bit DDR3 interconnects yielding an aggregate of over 1600 Gbps of off-chip memory bandwidth, which is 4x the DRAM bandwidth of recently announced competitive processors. The combination of the 128 NXCPUs with quad-issue and a superior memory sub-system architecture makes the device ideally suited for both data-plane applications that are inherently sensitive to memory latencies as well as control-plane applications that require best-in-class processing performance.

The XLP multi-core processor integrates a wide range of high-speed networking interfaces, including Interlaken, XAUI, SGMII, PCI-Express, USB2.0, and NetLogic Microsystems' high-bandwidth Inter-chip Coherency Interface (ICI) that provides seamless chip-to-chip cache and memory coherency with full software transparency. NetLogic Microsystems’ XLP processor is manufactured in TSMC's advanced 40nm process technology.

NetLogic Microsystems' multi-core processor family is supported by a comprehensive software development kit (SDK) that contains reference and production-ready software components, which enables customers to accelerate time-to-market.